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A.C. Solid state relay circuit and structure

A.C. Solid state relay circuit and structure

Solid state a.c. relays are well known. Such relays, with optical isolation between input and output, are also well known. In presently existing devices, many discrete components are commonly required to complete the a.c. circuit. Thus, it maytake thirty or more discrete thyristors, transistors, resistors and capacitors to manufacture a single device. Attempts have been made to integrate the various parts of the entire solid state relay, but these have met only limited success due to the mixof high voltage and high power components.

Solid state relays made in the past have also employed zero voltage crossing circuits to ensure turn on of the thyristor only when the a.c. voltage is within some small "window". These circuits have also been relatively complex and difficult tointegrate into the main power chip. Thus, zero cross firing circuits have required the use of a discrete resistor connected across the power terminals. These resistors have not been easily integrated into a single chip because of the difficulty offorming this resistor on the chip surface.

It has also been difficult to provide so-called "snubberless" operation for the relay under any inductive or resistive load. Thus, while solid state relays may operate well under resistive or slightly inductive loads, they may tend to "halfwave" or "chatter", which is a condition wherein a relay turns on only for one-half of a cycle, under a highly inductive load. This has occurred in the past because the relays are commonly provided with conditioning circuits for suppressing fast turn onof the circuit under some fast transient or high dV/dt condition. When the device is operated under a very highly inductive load, however, voltage transients are commonly generated repetitively during device turn on. When the signal conditioningcircuit misinterprets this as a transient signal, it shuts off the power output during a particular half phase of the operation. The circuit will then appear to turn to normal during the next half wave and the relay will turn on. This condition repeatsso that the relay turns on only during one or another of the half waves of the full cycle. To avoid this condition, relays of the past have been formed with reduced firing sensitivity and this has required reduction of sensitivity to optical firing.

Since prior art relays have been relatively complex, they have required substantial volume for their housings. Moreover, solid state relay of the past have been limited to a maximum temperature rise of about 110 C., thus limiting theircurrent-handling capability. Finally, solid state relays of the past have been relatively expensive in view of the need for large numbers of discrete components and large housings.

In accordance with the present invention, two identical thyristor power chips are provided for an a.c. relay wherein the power chips are both of lateral construction with both cathode and anode electrodes at one surface of each device and whereineach of the chips can be optically fired and has an optically sensitive upper surface which, when illuminated, will permit the device to become conductive between its anode and cathode electrodes.

The gate circuit of each of the thyristors is connected to a novel control circuit, formed either of discrete components or of components merged within the body of the semiconductor material forming the thyristor. The control circuit is operableto prevent turn on, even though the surface is illuminated, when the voltage across the device exceeds a value greater than some predetermined window value, or when high dV/dt transients appear across the device. This control circuit includes a clampingtransistor which can be turned on to clamp the gate of its respective thyristor and a capacitive divider circuit connected across the main power electrodes. The capacitive divider applies a control signal to the control transistor.

One of the capacitors of the capacitive divider includes the distributed capacitance of the control transistor. So long as the control transistor is on, its respective power thyristor cannot turn on even though its surface is illuminated. Thecapacitive divider is arranged so that the control transistor is normally turned on for all absolute voltages across the main device greater than some relatively small window value. Thus, the power thyristor cannot turn on outside of this small windowvalue or zero cross value.

The novel capacitance divider, in combination with the control transistor, will now operate to suppress both fast transients and still allow the device to function under its normal load condition. Thus, voltage transients which are generatedrepetitively during device turn on under highly inductive load conditions will not be misinterpreted as a fast transient and the power thyristor chip will be permitted to turn on in its normal manner under even highly inductive loads.

The novel signal conditioner of the invention also allows for substantial improvement in optical sensitivity of the device without misfiring. Note that currently available optically isolated triac drivers and the like are always limited eitherin dV/dt capability or optical sensitivity because of their inability to separate low level command signals from transients.

A novel housing is provided for the two chip arrangement in which the two chips are easily and inexpensively connected in parallel with one another and are protected from the outer environment. An alumina substrate or other suitable heatconductive but electrically insulative substrate is provided with suitable conductive patterns thereon for receiving the various chips of the switch and for connecting the chip electrodes to suitable output leads. The two identical thyristor chips whichare to be connected in anti-parallel are symmetrically secured to respective conductive pads on the substrate and are in alignment with one another and with the terminal ends of two conductive patterns on the substrate. Two continuous wires are thenstitch-bonded to the thyristor pads and conductive leads in such a manner that one lead wire is electrically connected to the anode pad of one chip, the cathode pad of the second chip and one of the conductive patterns which is connected to an input a.c.lead. The other wire is similarly connected to the other electrodes and conductive pattern to conduct the thyristors in anti-parallel.

plastic cap of a white illumination reflecting material then is secured to the substrate and covers the region of the substrate containing the LED and the two power chips. The interior of this cap may be filled with a transparent plastic whichencloses and encapsulates the surfaces of the chips and their interconnecting leads.

If the control circuit for the power transistor is carried out in discrete form, the discrete components may also be suitably connected to this substrate. Preferably, however, these components are integrated into the individual power chips sothat the entire solid state relay will consist of two power chips and their controls, the LED chip and the various support structures previously described.

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A.C. Solid state relay circuit and structure